Exemplary embodiments of the present invention relate to a non-volatile memory device, and more particularly, to a cache programming operation of a non-volatile memory device.
Memory devices are divided into volatile memory devices and non-volatile memory devices according to whether data is retained or not when a power source is cut off. Volatile memory devices lose data when power is cut off, where Dynamic Random Access Memory (DRAM) devices and Static Random Access Memory (SRAM) devices are exemplary volatile memory devices. On the other hand, non-volatile memory devices retain data stored therein although power is cut off, where flash memory devices are exemplary non-volatile memory devices.
Flash memory devices may use a cache programming method to increase a programming rate. According to the cache programming method, while a programming operation is performed, the data for the next programming operation is received and stored in a register (for example, an available latch of a page buffer) in advance and after the current programming operation is completed, the data for the next programming operation which has been stored in the register is programmed successively.
Since the data for the next programming operation should be received during the current programming operation, the current peak of the cache programming operation increases. Moreover, when the current peak exceeds the amount of current that may be supplied by a system that uses a non-volatile memory device, instable operation or operation failure may occur. Therefore, a technology that prevents the current peak from increasing during a cache programming operation is useful.